ADDPL

Add multiple of predicate register size to scalar register

Add the current predicate register size in bytes multiplied by an immediate in the range -32 to 31 to the 64-bit source general-purpose register or current stack pointer and place the result in the 64-bit destination general-purpose register or current stack pointer.

313029282726252423222120191817161514131211109876543210
00000100011Rn01010imm6Rd

ADDPL <Xd|SP>, <Xn|SP>, #<imm>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer n = UInt(Rn); constant integer d = UInt(Rd); constant integer imm = SInt(imm6);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm>

Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operation

CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant bits(64) operand1 = if n == 31 then SP[] else X[n, 64]; constant bits(64) result = operand1 + (imm * (PL DIV 8)); if d == 31 then SP[] = result; else X[d, 64] = result;

Operational information

If FEAT_SVE2 is implemented or FEAT_SME is implemented, then if PSTATE.DIT is 1:


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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