ADDPT

Add checked pointer adds a base address register value and an optionally-shifted register value, and writes the result to the destination register. The optionally-shifted register value is treated as the offset.

If the operation would have generated a result where the most significant 8 bits of the result register differ from the most significant 8 bits of the base register, then the result is modified such that it is likely to be non-canonical when used as an address.

Integer
(FEAT_CPA)

313029282726252423222120191817161514131211109876543210
10011010000Rm001imm3RnRd
sfopS

ADDPT <Xd|SP>, <Xn|SP>, <Xm>{, LSL #<amount>}

if !IsFeatureImplemented(FEAT_CPA) then UNDEFINED; integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer shift = UInt(imm3);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the general-purpose destination register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the first general-purpose source register or stack pointer, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.

<amount>

Is the left shift amount, in the range 0 to 7, defaulting to 0, encoded in the "imm3" field.

Operation

bits(64) result; bits(64) base = if n == 31 then SP[] else X[n, 64]; bits(64) offset = LSL(X[m, 64], shift); result = base + offset; result = PointerAddCheck(result, base); if d == 31 then SP[] = result; else X[d, 64] = result;


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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