BFCVT

Floating-point convert from single-precision to BFloat16 format (scalar) converts the single-precision floating-point value in the 32-bit SIMD&FP source register to BFloat16 format and writes the result in the 16-bit SIMD&FP destination register.

ID_AA64ISAR1_EL1.BF16 indicates whether this instruction is supported.

Single-precision to BFloat16
(FEAT_BF16)

313029282726252423222120191817161514131211109876543210
0001111001100011010000RnRd
MSftypeopcode

BFCVT <Hd>, <Sn>

if !IsFeatureImplemented(FEAT_BF16) then UNDEFINED; integer n = UInt(Rn); integer d = UInt(Rd);

Assembler Symbols

<Hd>

Is the 16-bit name of the SIMD&FP destination register, encoded in the "Rd" field.

<Sn>

Is the 32-bit name of the SIMD&FP source register, encoded in the "Rn" field.

Operation

CheckFPEnabled64(); bits(32) operand = V[n, 32]; boolean merge = IsMerging(FPCR); bits(128) result = if merge then V[d, 128] else Zeros(128); Elem[result, 0, 16] = FPConvertBF(operand, FPCR); V[d, 128] = result;


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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