Compare and Branch on Zero compares the value in a register with zero, and conditionally branches to a label at a PC-relative offset if the comparison is equal. It provides a hint that this is not a subroutine call or return. This instruction does not affect condition flags.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm19 | Rt | ||||||||||||||||||||||
| op | |||||||||||||||||||||||||||||||
integer t = UInt(Rt); constant integer datasize = 32 << UInt(sf); bits(64) offset = SignExtend(imm19:'00', 64);
| <Wt> |
Is the 32-bit name of the general-purpose register to be tested, encoded in the "Rt" field. |
| <label> |
Is the program label to be conditionally branched to. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4. |
| <Xt> |
Is the 64-bit name of the general-purpose register to be tested, encoded in the "Rt" field. |
boolean branch_conditional = TRUE; bits(datasize) operand1 = X[t, datasize]; if IsZero(operand1) then BranchTo(PC64 + offset, BranchType_DIR, branch_conditional); else BranchNotTaken(BranchType_DIR, branch_conditional);
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.