FCVT (narrowing, FP32 to FP8)

Multi-vector floating-point convert from single-precision to packed 8-bit floating-point format

Convert each single-precision element of the four source vectors to 8-bit floating-point while scaling the value by 2SInt(FPMR.NSCALE), and place the results in the quarter-width elements of the destination vector. The 8-bit floating-point encoding format is selected by FPMR.F8D.

This instruction is unpredicated.

SME2
(FEAT_FP8)

313029282726252423222120191817161514131211109876543210
1100000100110100111000Zn00Zd
N

FCVT <Zd>.B, { <Zn1>.S-<Zn4>.S }

if !IsFeatureImplemented(FEAT_SME2) || !IsFeatureImplemented(FEAT_FP8) then UNDEFINED; constant integer n = UInt(Zn:'00'); constant integer d = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<Zn1>

Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 4.

<Zn4>

Is the name of the fourth scalable vector register of the source multi-vector group, encoded as "Zn" times 4 plus 3.

Operation

CheckFPMREnabled(); CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV 32; bits(VL) result; constant bits(VL) operand1 = Z[n+0, VL]; constant bits(VL) operand2 = Z[n+1, VL]; constant bits(VL) operand3 = Z[n+2, VL]; constant bits(VL) operand4 = Z[n+3, VL]; for e = 0 to elements-1 constant bits(32) element1 = Elem[operand1, e, 32]; constant bits(32) element2 = Elem[operand2, e, 32]; constant bits(32) element3 = Elem[operand3, e, 32]; constant bits(32) element4 = Elem[operand4, e, 32]; Elem[result, 0*elements + e, 8] = FPConvertFP8(element1, FPCR, FPMR, 8); Elem[result, 1*elements + e, 8] = FPConvertFP8(element2, FPCR, FPMR, 8); Elem[result, 2*elements + e, 8] = FPConvertFP8(element3, FPCR, FPMR, 8); Elem[result, 3*elements + e, 8] = FPConvertFP8(element4, FPCR, FPMR, 8); Z[d, VL] = result;


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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