FRINT<r>

Floating-point round to integral value (predicated)

Round to an integral floating-point value with the specified rounding option from each active floating-point element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified.

<r> Rounding Option
N to nearest, with ties to even
A to nearest, with ties away from zero
M toward minus Infinity
P toward plus Infinity
Z toward zero
I current FPCR rounding mode
X current FPCR rounding mode, signalling inexact

It has encodings from 7 classes: Current mode , Current mode signalling inexact , Nearest with ties to away , Nearest with ties to even , Toward zero , Toward minus infinity and Toward plus infinity

Current mode

313029282726252423222120191817161514131211109876543210
01100101size000111101PgZnZd

FRINTI <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRoundingMode(FPCR);

Current mode signalling inexact

313029282726252423222120191817161514131211109876543210
01100101size000110101PgZnZd

FRINTX <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = TRUE; constant FPRounding rounding = FPRoundingMode(FPCR);

Nearest with ties to away

313029282726252423222120191817161514131211109876543210
01100101size000100101PgZnZd

FRINTA <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEAWAY;

Nearest with ties to even

313029282726252423222120191817161514131211109876543210
01100101size000000101PgZnZd

FRINTN <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEEVEN;

Toward zero

313029282726252423222120191817161514131211109876543210
01100101size000011101PgZnZd

FRINTZ <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_ZERO;

Toward minus infinity

313029282726252423222120191817161514131211109876543210
01100101size000010101PgZnZd

FRINTM <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_NEGINF;

Toward plus infinity

313029282726252423222120191817161514131211109876543210
01100101size000001101PgZnZd

FRINTP <Zd>.<T>, <Pg>/M, <Zn>.<T>

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_POSINF;

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 RESERVED
01 H
10 S
11 D
<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>

Is the name of the source scalable vector register, encoded in the "Zn" field.

Operation

CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL); bits(VL) result = Z[d, VL]; for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then constant bits(esize) element = Elem[operand, e, esize]; Elem[result, e, esize] = FPRoundInt(element, FPCR, rounding, exact); Z[d, VL] = result;

Operational information

This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is constrained unpredictable:


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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