GCSSTTR

Guarded Control Stack unprivileged Store stores a doubleword from a register to memory. The address that is used for the store is calculated from a base register.

Memory accesses made by the instruction behave as if the instruction was executed at EL0 if the Effective value of PSTATE.UAO is 0 and either:

Otherwise, the memory access operates with the restrictions determined by the Exception level at which the instruction is executed.

Integer
(FEAT_GCS)

313029282726252423222120191817161514131211109876543210
1101100100011111000111RnRt
opc

GCSSTTR <Xt>, [<Xn|SP>]

if !IsFeatureImplemented(FEAT_GCS) then UNDEFINED; integer t = UInt(Rt); integer n = UInt(Rn);

Assembler Symbols

<Xt>

Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

Operation

bits(64) address; bits(64) data; bits(2) effective_el = if AArch64.IsUnprivAccessPriv() then PSTATE.EL else EL0; if effective_el == PSTATE.EL then CheckGCSSTREnabled(); boolean privileged = effective_el != EL0; AccessDescriptor accdesc = CreateAccDescGCS(MemOp_STORE, privileged); if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; data = X[t, 64]; Mem[address, 8, accdesc] = data;


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.