HLT

Halt instruction. An HLT instruction can generate a Halt Instruction debug event, which causes entry into Debug state.

Within a guarded memory region, while PSTATE.BTYPE != 0b00, a HLT instruction that would cause entry into Debug state will not generate a Branch Target Exception and will cause entry into Debug state as normal. For more information, see PSTATE.BTYPE.

313029282726252423222120191817161514131211109876543210
11010100010imm1600000
opcop2LL

HLT #<imm>

if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED; if IsFeatureImplemented(FEAT_BTI) then SetBTypeCompatible(TRUE);

Assembler Symbols

<imm>

Is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm16" field.


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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