MADDPT

Multiply-Add checked pointer multiplies two register values, adds a third register value, and writes the result to the destination register. The intermediate product is treated as the offset.

If the operation would have generated a result where the most significant 8 bits of the result register differ from the most significant 8 bits of the base register, then the result is modified such that it is likely to be non-canonical when used as an address.

If the intermediate product cannot be correctly represented as a 64-bit two's complement value, then the result is modified such that it is likely to be non-canonical when used as an address.

Integer
(FEAT_CPA)

313029282726252423222120191817161514131211109876543210
10011011011Rm0RaRnRd
sfop54op31o0

MADDPT <Xd>, <Xn>, <Xm>, <Xa>

if !IsFeatureImplemented(FEAT_CPA) then UNDEFINED; integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer a = UInt(Ra);

Assembler Symbols

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the first general-purpose source register holding the multiplicand, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register holding the multiplier, encoded in the "Rm" field.

<Xa>

Is the 64-bit name of the third general-purpose source register holding the addend, encoded in the "Ra" field.

Operation

bits(64) operand1 = X[n, 64]; bits(64) operand2 = X[m, 64]; bits(64) operand3 = X[a, 64]; bits(64) result; integer product = SInt(operand1) * SInt(operand2); // Signed and unsigned twos complement arithmetic are equivalent if only a // fixed number of bits are considered. result = operand3 + product<63:0>; boolean overflow = (product != SInt(product<63:0>)); result = PointerMultiplyAddCheck(result, operand3, overflow); X[d, 64] = result;


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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