Multi-vector conditionally select elements from two vectors
Read active elements from the two or four first source vectors and inactive elements from the two or four second source vectors and place in the corresponding elements of the two or four destination vectors.
It has encodings from 2 classes: Two registers and Four registers
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | size | 1 | Zm | 0 | 1 | 0 | 0 | PNg | Zn | 0 | Zd | 0 |
if !IsFeatureImplemented(FEAT_SME2) then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn:'0'); constant integer m = UInt(Zm:'0'); constant integer d = UInt(Zd:'0'); constant integer g = UInt('1':PNg); constant integer nreg = 2;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | size | 1 | Zm | 0 | 1 | 1 | 0 | 0 | PNg | Zn | 0 | 0 | Zd | 0 | 0 |
if !IsFeatureImplemented(FEAT_SME2) then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn:'00'); constant integer m = UInt(Zm:'00'); constant integer d = UInt(Zd:'00'); constant integer g = UInt('1':PNg); constant integer nreg = 4;
<T> |
Is the size specifier,
encoded in
|
<Zd4> |
Is the name of the fourth scalable vector register of the destination multi-vector group, encoded as "Zd" times 4 plus 3. |
<Zd2> |
Is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1. |
<PNg> |
Is the name of the governing scalable predicate register PN8-PN15, with predicate-as-counter encoding, encoded in the "PNg" field. |
<Zn4> |
Is the name of the fourth scalable vector register of the first source multi-vector group, encoded as "Zn" times 4 plus 3. |
<Zn2> |
Is the name of the second scalable vector register of the first source multi-vector group, encoded as "Zn" times 2 plus 1. |
<Zm4> |
Is the name of the fourth scalable vector register of the second source multi-vector group, encoded as "Zm" times 4 plus 3. |
<Zm2> |
Is the name of the second scalable vector register of the second source multi-vector group, encoded as "Zm" times 2 plus 1. |
CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; array [0..3] of bits(VL) results; constant bits(PL) pred = P[g, PL]; constant bits(PL * nreg) mask = CounterToPredicate(pred<15:0>, PL * nreg); for r = 0 to nreg-1 constant bits(VL) operand1 = Z[n+r, VL]; constant bits(VL) operand2 = Z[m+r, VL]; for e = 0 to elements-1 if ActivePredicateElement(mask, r * elements + e, esize) then Elem[results[r], e, esize] = Elem[operand1, e, esize]; else Elem[results[r], e, esize] = Elem[operand2, e, esize]; for r = 0 to nreg-1 Z[d+r, VL] = results[r];
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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