SYSP

128-bit System instruction.

This instruction is used by the alias TLBIP.

System
(FEAT_SYSINSTR128)

313029282726252423222120191817161514131211109876543210
1101010101001op1CRnCRmop2Rt
L

SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt1>, <Xt2>}

if !IsFeatureImplemented(FEAT_SYSINSTR128) then UNDEFINED; if Rt<0> == '1' && Rt != '11111' then UNDEFINED; AArch64.CheckSystemAccess('01', op1, CRn, CRm, op2, Rt, L); integer t = UInt(Rt); integer t2 = if t == 31 then 31 else t + 1; integer sys_op0 = 1; integer sys_op1 = UInt(op1); integer sys_op2 = UInt(op2); integer sys_crn = UInt(CRn); integer sys_crm = UInt(CRm);

Assembler Symbols

<op1>

Is a 3-bit unsigned immediate, in the range 0 to 6, encoded in the "op1" field.

<Cn>

Is a name 'Cn', with 'n' in the range 8 to 9, encoded in the "CRn" field.

<Cm>

Is a name 'Cm', with 'm' in the range 0 to 7, encoded in the "CRm" field.

<op2>

Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.

<Xt1>

Is the 64-bit name of the first optional general-purpose source register, defaulting to '11111', encoded in the "Rt" field.

<Xt2>

Is the 64-bit name of the second optional general-purpose source register, defaulting to '11111', encoded as "Rt" +1. Defaults to '11111' if "Rt" = '11111'.

Alias Conditions

AliasIs preferred when
TLBIPCRn IN {'100x'} && SysOp(op1, CRn, CRm, op2) == Sys_TLBIP

Operation

AArch64.SysInstr128(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t, t2);


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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