UBFM

Unsigned Bitfield Move is usually accessed via one of its aliases, which are always preferred for disassembly.

If <imms> is greater than or equal to <immr>, this copies a bitfield of (<imms>-<immr>+1) bits starting from bit position <immr> in the source register to the least significant bits of the destination register.

If <imms> is less than <immr>, this copies a bitfield of (<imms>+1) bits from the least significant bits of the source register to bit position (regsize-<immr>) of the destination register, where regsize is the destination register size of 32 or 64 bits.

In both cases the destination bits below and above the bitfield are set to zero.

This instruction is used by the aliases LSL (immediate), LSR (immediate), UBFIZ, UBFX, UXTB, and UXTH.

313029282726252423222120191817161514131211109876543210
sf10100110NimmrimmsRnRd
opc

32-bit (sf == 0 && N == 0)

UBFM <Wd>, <Wn>, #<immr>, #<imms>

64-bit (sf == 1 && N == 1)

UBFM <Xd>, <Xn>, #<immr>, #<imms>

if sf == '1' && N != '1' then UNDEFINED; if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then UNDEFINED; integer d = UInt(Rd); integer n = UInt(Rn); constant integer datasize = 32 << UInt(sf); integer s = UInt(imms); integer r = UInt(immr); bits(datasize) wmask; bits(datasize) tmask; (wmask, tmask) = DecodeBitMasks(N, imms, immr, FALSE, datasize);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<immr>

For the 32-bit variant: is the right rotate amount, in the range 0 to 31, encoded in the "immr" field.

For the 64-bit variant: is the right rotate amount, in the range 0 to 63, encoded in the "immr" field.

<imms>

For the 32-bit variant: is the leftmost bit number to be moved from the source, in the range 0 to 31, encoded in the "imms" field.

For the 64-bit variant: is the leftmost bit number to be moved from the source, in the range 0 to 63, encoded in the "imms" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Alias Conditions

AliasOf variantIs preferred when
LSL (immediate)32-bitimms != '011111' && UInt(imms) + 1 == UInt(immr)
LSL (immediate)64-bitimms != '111111' && UInt(imms) + 1 == UInt(immr)
LSR (immediate)32-bitimms == '011111'
LSR (immediate)64-bitimms == '111111'
UBFIZ UInt(imms) < UInt(immr)
UBFX BFXPreferred(sf, opc<1>, imms, immr)
UXTBimmr == '000000' && imms == '000111'
UXTHimmr == '000000' && imms == '001111'

Operation

bits(datasize) src = X[n, datasize]; // Perform bitfield move on low bits bits(datasize) bot = ROR(src, r) AND wmask; // Combine extension bits and result bits X[d, datasize] = bot AND tmask;

Operational information

If PSTATE.DIT is 1:


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.