IC IALLUIS, Instruction Cache Invalidate All to PoU, Inner Shareable

Executing IC IALLUIS

The Rt field should be set to 0b11111. If the Rt field is not set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether:

• The instruction is UNDEFINED.

• The instruction behaves as if the Rt field is set to 0b11111.

Accesses to this instruction use the following encodings in the System instruction encoding space:

op0	op1	CRn	CRm	op2
0b01	0b000	0b0111	0b0001	0b000

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2.TPU == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.TICAB == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGITR_EL2.ICIALLUIS == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.IC(CacheOpScope_ALLUIS); elsif PSTATE.EL == EL2 then AArch64.IC(CacheOpScope_ALLUIS); elsif PSTATE.EL == EL3 then AArch64.IC(CacheOpScope_ALLUIS);