SPMROOTCR

This register is present only when FEAT_RME is implemented and FEAT_SPMU is implemented. Otherwise, direct accesses to SPMROOTCR_EL3 are UNDEFINED.

Attributes

Field descriptions

IMPLEMENTATION DEFINED, bits [63:32]

IMPLEMENTATION DEFINED observation controls. Additional IMPLEMENTATION DEFINED bits to control certain types of filter or events by System PMU <s>.

The reset behavior of this field is:

On a System PMU reset, this field resets to an IMPLEMENTATION DEFINED value.

Bit [31]

Bits [30:4]

NAO, bit [3]
When System PMU <s> can count or monitor non-attributable events:

Non-attributable Observation. Controls whether events or monitorable characteristics not attributable with any source can be monitored by System PMU <s>.

NAO	Meaning
0b0	Events not attributable with any event source are not counted by System PMU <s>.
0b1	Counting non-attributable events by System PMU <s> is not prevented by this mechanism.

When both SPMROOTCR_EL3 and SPMSCR_EL1 are implemented, non-attributable events are counted only if both SPMROOTCR_EL3.NAO is 1 and SPMSCR_EL1.{NAO, SO} is nonzero.

SPMROOTCR_EL3.NAO has the opposite reset polarity to SPMSCR_EL1.NAO.

The reset behavior of this field is:

On a System PMU reset, this field resets to 1.

Otherwise:

Bit [2]

RLO, bit [1]

Realm Observation. Controls whether events or monitorable characteristics attributable to a Realm event source can be monitored by System PMU <s>.

RLO	Meaning
0b0	Events attributable to a Realm event source are not counted by System PMU <s>.
0b1	Counting events by System PMU <s> that are attributable to a Realm event source is not prevented by this mechanism.

The reset behavior of this field is:

On a System PMU reset, this field resets to 0.

RTO, bit [0]

Root Observation. Controls whether events or monitorable characteristics attributable to a Root event source can be monitored by System PMU <s>.

RTO	Meaning
0b0	Events attributable to a Root event source are not counted by System PMU <s>.
0b1	Counting events by System PMU <s> that are attributable to a Root event source is not prevented by this mechanism.

The reset behavior of this field is:

On a System PMU reset, this field resets to 0.

Accessing SPMROOTCR_EL3

To access SPMROOTCR_EL3 for System PMU <s>, set SPMSELR_EL0.SYSPMUSEL to s.

SPMROOTCR_EL3 reads-as-zero and ignores writes if any of the following are true:

System PMU <s> is not implemented.
System PMU <s> does not implement SPMROOTCR_EL3.

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, SPMROOTCR_EL3

op0	op1	CRn	CRm	op2
0b10	0b110	0b1001	0b1110	0b111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then X[t, 64] = SPMROOTCR_EL3[UInt(SPMSELR_EL0.SYSPMUSEL)];

MSR SPMROOTCR_EL3, <Xt>

op0	op1	CRn	CRm	op2
0b10	0b110	0b1001	0b1110	0b111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented(FEAT_FGWTE3) && FGWTE3_EL3.SPMROOTCR_EL3 == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else SPMROOTCR_EL3[UInt(SPMSELR_EL0.SYSPMUSEL)] = X[t, 64];

63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
IMPLEMENTATION DEFINED
RAO	RES0																											NAO	RES0	RLO	RTO

SPMROOTCR_EL3, System Performance Monitors Root and Realm Control Register

Purpose

Configuration

Attributes

Field descriptions

IMPLEMENTATION DEFINED, bits [63:32]

Bit [31]

Bits [30:4]

NAO, bit [3]
When System PMU <s> can count or monitor non-attributable events:

Otherwise:

Bit [2]

RLO, bit [1]

RTO, bit [0]

Accessing SPMROOTCR_EL3

MRS <Xt>, SPMROOTCR_EL3

MSR SPMROOTCR_EL3, <Xt>

SPMROOTCR_EL3, System Performance Monitors Root and Realm Control Register

Purpose

Configuration

Attributes

Field descriptions

IMPLEMENTATION DEFINED, bits [63:32]

Bit [31]

Bits [30:4]

NAO, bit [3]When System PMU <s> can count or monitor non-attributable events:

Otherwise:

Bit [2]

RLO, bit [1]

RTO, bit [0]

Accessing SPMROOTCR_EL3

MRS <Xt>, SPMROOTCR_EL3

MSR SPMROOTCR_EL3, <Xt>

NAO, bit [3]
When System PMU <s> can count or monitor non-attributable events: