AMDEVAFF, Activity Monitors Device Affinity Register

The AMDEVAFF characteristics are:

Purpose

Copy of the PE MPIDR_EL1 register that allows a debugger to determine which PE in a multiprocessor system the AMU component relates to.

Configuration

It is IMPLEMENTATION DEFINED whether AMDEVAFF is implemented in the Core power domain or in the Debug power domain.

This register is present only when FEAT_AMUv1 is implemented, FEAT_AMU_EXT64 is implemented and an implementation implements AMDEVAFF1. Otherwise, direct accesses to AMDEVAFF are RES0.

Attributes

AMDEVAFF is a 64-bit register.

This register is part of the AMU block.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
MPIDR_EL1hi
MPIDR_EL1lo

MPIDR_EL1hi, bits [63:32]

MPIDR_EL1 high half. Read-only copy of the high half of MPIDR_EL1, as seen from the highest implemented Exception level.

MPIDR_EL1lo, bits [31:0]

MPIDR_EL1 low half. Read-only copy of the low half of MPIDR_EL1, as seen from the highest implemented Exception level.

Accessing AMDEVAFF

Accesses to this register use the following encodings:

Accessible at offset 0xFA8 from AMU

Accesses on this interface are RO.


26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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