EDDFR2

Field descriptions

Bits [63:8]

Reserved, RES0.

BWE, bits [7:4]

Breakpoints and watchpoint enhancements.

The value of this field is an IMPLEMENTATION DEFINED choice of:

BWE	Meaning
0b0000	This field does not indicate whether DBGBCR<n>_EL1.MASK and address mismatch breakpoints are implemented.
0b0001	DBGBCR<n>_EL1.MASK and address mismatch breakpoints are implemented.
0b0010	As 0b0001, and address mismatch watchpoints are implemented.

All other values are reserved.

FEAT_BWE implements the functionality identified by the value 0b0001.

FEAT_BWE2 implements the functionality identified by the value 0b0010.

From Armv9.5, the permitted values are 0b0000 and 0b0010.

When this field is 0b0000, ID_AA64DFR1_EL1.ABLE might indicate the presence of support for DBGBCR<n>_EL1.MASK and address mismatch breakpoints.

In an implementation that supports AArch64, this field has the same value as ID_AA64DFR2_EL1.BWE.

Access to this field is RO.

STEP, bits [3:0]

This field either has the same value as ID_AA64DFR2_EL1.STEP or reads as zero.

Accessing EDDFR2

EDDFR2 can be accessed through the external debug interface:

Component	Offset	Instance
Debug	0xD50	EDDFR2

Component

Offset

Instance

Debug

0xD50

EDDFR2

This interface is accessible as follows:

When IsCorePowered(), !DoubleLockStatus() and (!IsZero(EDDFR2) or !OSLockStatus()), accesses to this register are RO.

When FEAT_DoPD is implemented and !IsCorePowered(), accesses to this register generate an error response.

Otherwise, accesses to this register are IMPDEF.

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

EDDFR2, External Debug Feature Register 2