The MPAMCFG_INTPARTID characteristics are:
MPAMCFG_INTPARTID is a 32-bit read/write register that controls the mapping of the PARTID selected by MPAMCFG_PART_SEL into a narrower internal PARTID (intPARTID).
MPAMCFG_INTPARTID_s controls the mapping for the Secure PARTID selected by the Secure instance of MPAMCFG_PART_SEL. MPAMCFG_INTPARTID_ns controls the mapping for the Non-secure PARTID selected by the Non-secure instance of MPAMCFG_PART_SEL. MPAMCFG_INTPARTID_rt controls the mapping for the Root PARTID selected by the Root instance of MPAMCFG_PART_SEL. MPAMCFG_INTPARTID_rl controls the mapping for the Realm PARTID selected by the Realm instance of MPAMCFG_PART_SEL.
The MPAMCFG_INTPARTID register associates the request PARTID (reqPARTID) in the MPAMCFG_PART_SEL register with an internal PARTID (intPARTID) in this register. To set that association, store reqPARTID into the MPAMCFG_PART_SEL register and then store the intPARTID into the MPAMCFG_INTPARTID register. To read the association, store reqPARTID into the MPAMCFG_PART_SEL register and then read MPAMCFG_INTPARTID.
If the intPARTID stored into MPAMCFG_INTPARTID is out-of-range or does not have the INTERNAL bit set, the association of reqPARTID to intPARTID is not written and MPAMF_ESR is set to indicate an intPARTID_Range error.
If MPAMCFG_PART_SEL.INTERNAL is 1 when MPAMCFG_INTPARTID is read or written, MPAMF_ESR is set to indicate an Unexpected_INTERNAL error.
The power domain of MPAMCFG_INTPARTID is IMPLEMENTATION DEFINED.
This register is present only when FEAT_MPAM is implemented and MPAMF_IDR.HAS_PARTID_NRW == 1. Otherwise, direct accesses to MPAMCFG_INTPARTID are RES0.
The power and reset domain of each MSC component is specific to that component.
MPAMCFG_INTPARTID is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | INTERNAL | INTPARTID |
Reserved, RES0.
Internal PARTID flag.
This bit must be 1 when written to the register. If written as 0, the write will not update the reqPARTID to intPARTID association.
On a read of this register, the bit will always read the value last written.
This field contains the intPARTID mapped to the reqPARTID in MPAMCFG_PART_SEL.
The maximum intPARTID supported is MPAMF_PARTID_NRW_IDR.INTPARTID_MAX.
This register is within the MPAM feature page memory frames.
In a system that supports Secure, Non-secure, Root, and Realm memory maps, there must be MPAM feature pages in all four address maps:
MPAMCFG_INTPARTID_s, MPAMCFG_INTPARTID_ns, MPAMCFG_INTPARTID_rt, and MPAMCFG_INTPARTID_rl must be separate registers:
When RIS is implemented, loads and stores to MPAMCFG_INTPARTID access the PARTID narrowing configuration settings without being affected by MPAMCFG_PART_SEL.RIS.
Loads and stores to MPAMCFG_INTPARTID access the PARTID narrowing configuration settings for the request PARTID selected by MPAMCFG_PART_SEL.PARTID_SEL, and MPAMCFG_PART_SEL.INTERNAL must be 0.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x0600 | MPAMCFG_INTPARTID_s |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_ns | 0x0600 | MPAMCFG_INTPARTID_ns |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rt | 0x0600 | MPAMCFG_INTPARTID_rt |
When FEAT_RME is implemented, accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rl | 0x0600 | MPAMCFG_INTPARTID_rl |
When FEAT_RME is implemented, accesses on this interface are RW.
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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