The TRBDEVARCH characteristics are:
Provides discovery information for the component.
TRBDEVARCH is in the Core power domain.
This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBDEVARCH are RES0.
TRBDEVARCH is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ARCHITECT | PRESENT | REVISION | ARCHVER | ARCHPART | |||||||||||||||||||||||||||
Defines the architect of the component. For Trace Buffer, this is Arm Limited.
Bits [31:28] are the JEP106 continuation code, 0b0100.
Bits [27:21] are the JEP106 identification code, 0b0111011.
Reads as 0b01000111011.
Access to this field is RO.
DEVARCH present. Indicates that the TRBDEVARCH register is present.
Reads as 0b1.
Access to this field is RO.
Revision. Defines the architecture revision of the component.
| REVISION | Meaning |
|---|---|
| 0b0000 |
Revision 0. |
All other values are reserved.
Access to this field is RO.
Architecture Version. Defines the architecture version of the component.
| ARCHVER | Meaning |
|---|---|
| 0b0000 |
Trace Buffer Extension version 1. |
All other values are reserved.
TRBDEVARCH.ARCHVER and TRBDEVARCH.ARCHPART are also defined as a single field, TRBDEVARCH.ARCHID, so that TRBDEVARCH.ARCHVER is TRBDEVARCH.ARCHID[15:12].
Access to this field is RO.
Architecture Part. Defines the architecture of the component.
| ARCHPART | Meaning |
|---|---|
| 0xA18 |
Armv9-A Trace Buffer Extension. |
TRBDEVARCH.ARCHVER and TRBDEVARCH.ARCHPART are also defined as a single field, TRBDEVARCH.ARCHID, so that TRBDEVARCH.ARCHPART is TRBDEVARCH.ARCHID[11:0].
Access to this field is RO.
| Component | Offset | Instance |
|---|---|---|
| TRBE | 0xFBC | TRBDEVARCH |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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