The TRCCLAIMSET characteristics are:
In conjunction with TRCCLAIMCLR, provides Claim Tag bits that can be separately set and cleared to indicate whether functionality is in use by a debug agent.
For additional information, see the CoreSight Architecture Specification.
External register TRCCLAIMSET bits [31:0] are architecturally mapped to AArch64 System register TRCCLAIMSET[31:0].
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCCLAIMSET are RES0.
The number of claim tag bits implemented is IMPLEMENTATION DEFINED. Arm recommends that implementations support a minimum of four claim tag bits, that is, SET[3:0] reads as 0b1111.
TRCCLAIMSET is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SET[31] | SET[30] | SET[29] | SET[28] | SET[27] | SET[26] | SET[25] | SET[24] | SET[23] | SET[22] | SET[21] | SET[20] | SET[19] | SET[18] | SET[17] | SET[16] | SET[15] | SET[14] | SET[13] | SET[12] | SET[11] | SET[10] | SET[9] | SET[8] | SET[7] | SET[6] | SET[5] | SET[4] | SET[3] | SET[2] | SET[1] | SET[0] |
Claim Tag Set. Indicates whether Claim Tag bit <m> is implemented, and is used to set Claim Tag bit <m> to 1.
| SET[<m>] | Meaning |
|---|---|
| 0b0 | On a read: Claim Tag bit <m> is not implemented. On a write: Ignored. |
| 0b1 | On a read: Claim Tag bit <m> is implemented. On a write: Set Claim Tag bit <m> to 1. |
This bit reads-as-zero and ignores writes if m > the number of Claim Tag bits.
Access to this field is RAO/W1S.
| Component | Offset | Instance |
|---|---|---|
| ETE | 0xFA0 | TRCCLAIMSET |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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