The TRCIDR5 characteristics are:
Returns the tracing capabilities of the trace unit.
External register TRCIDR5 bits [31:0] are architecturally mapped to AArch64 System register TRCIDR5[31:0].
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCIDR5 are RES0.
TRCIDR5 is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OE | NUMCNTR | NUMSEQSTATE | RES0 | LPOVERRIDE | ATBTRIG | TRACEIDSIZE | RES0 | NUMEXTINSEL | NUMEXTIN | ||||||||||||||||||||||
Indicates support for the ETE Trace Output Enable.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| OE | Meaning |
|---|---|
| 0b0 |
ETE Trace Output Enable is not implemented. |
| 0b1 |
ETE Trace Output Enable is implemented. |
When FEAT_ETEv1p3 is implemented and when any IMPLEMENTATION DEFINED trace output interface is implemented, this field is 1.
Access to this field is RO.
Indicates the number of Counters that are available for tracing.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| NUMCNTR | Meaning |
|---|---|
| 0b000..0b100 |
The number of Counters implemented. |
All other values are reserved.
If TRCIDR4.NUMRSPAIR == 0b0000 then this field is 0b000.
Access to this field is RO.
Indicates if the Sequencer is implemented and the number of Sequencer states that are implemented.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| NUMSEQSTATE | Meaning |
|---|---|
| 0b000 |
The Sequencer is not implemented. |
| 0b100 |
Four Sequencer states are implemented. |
All other values are reserved.
If TRCIDR4.NUMRSPAIR == 0b0000 then this field is 0b000.
Access to this field is RO.
Reserved, RES0.
Indicates support for Low-power Override Mode.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| LPOVERRIDE | Meaning |
|---|---|
| 0b0 |
The trace unit does not support Low-power Override Mode. |
| 0b1 |
The trace unit supports Low-power Override Mode. |
Access to this field is RO.
Indicates if the implementation can support ATB triggers.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| ATBTRIG | Meaning |
|---|---|
| 0b0 |
The implementation does not support ATB triggers. |
| 0b1 |
The implementation supports ATB triggers. |
If TRCIDR4.NUMRSPAIR == 0b0000 then this field is 0.
Access to this field is RO.
Indicates the trace ID width.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| TRACEIDSIZE | Meaning |
|---|---|
| 0b000000 |
The external trace interface is not implemented. |
| 0b000111 |
The implementation supports a 7-bit trace ID. |
All other values are reserved.
AMBA ATB requires a 7-bit trace ID width.
Access to this field is RO.
Reserved, RES0.
Indicates how many External Input Selector resources are implemented.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| NUMEXTINSEL | Meaning |
|---|---|
| 0b000..0b100 |
The number of External Input Selector resources implemented. |
All other values are reserved.
Access to this field is RO.
Indicates how many External Inputs are implemented.
| NUMEXTIN | Meaning |
|---|---|
| 0b111111111 |
Unified PMU event selection. |
All other values are reserved.
Access to this field is RO.
| Component | Offset | Instance |
|---|---|---|
| ETE | 0x1F4 | TRCIDR5 |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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