The TRCPDCR characteristics are:
Requests the system to provide power to the trace unit.
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCPDCR are RES0.
TRCPDCR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | PU | RES0 | |||||||||||||||||||||||||||||
Reserved, RES0.
Power Up Request.
| PU | Meaning |
|---|---|
| 0b0 |
The system can remove power from the trace unit core power domain, or requests for power to the trace unit core power domain are implemented outside of the trace unit. |
| 0b1 |
The system must provide power to the trace unit core power domain. |
This field is RES0.
Reserved, RES0.
External debugger accesses to this register are unaffected by the OS Lock.
| Component | Offset | Instance |
|---|---|---|
| ETE | 0x310 | TRCPDCR |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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