ERXPFGF_EL1, Selected Pseudo-fault Generation Feature Register

Accessing ERXPFGF_EL1

If ERRIDR_EL1.NUM is 0x0000 or ERRSELR_EL1.SEL is greater than or equal to ERRIDR_EL1.NUM, then one of the following occurs:

• An UNKNOWN error record is selected.
• ERXPFGF_EL1 is RAZ.
• Direct reads of ERXPFGF_EL1 are NOPs.
• Direct reads of ERXPFGF_EL1 are UNDEFINED.

If ERRSELR_EL1.SEL selects an error record owned by a node that does not implement the Common Fault Injection Model Extension, then one of the following occurs:

• ERXPFGF_EL1 is RAZ.
• Direct reads of ERXPFGF_EL1 are NOPs.
• Direct reads of ERXPFGF_EL1 are UNDEFINED.

If ERRSELR_EL1.SEL is not the index of the first error record owned by a node, then ERR<n>PFGF is not present, meaning reads of ERXPFGF_EL1 are RES0.

ERR<n>PFGF describes additional constraints that also apply when ERR<n>PFGF is accessed through ERXPFGF_EL1.

Accesses to this register use the following encodings in the System register encoding space:

op0	op1	CRn	CRm	op2
0b11	0b000	0b0101	0b0100	0b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3.FIEN == '0' then UNDEFINED; elsif EL2Enabled() && HCR_EL2.FIEN == '0' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGRTR_EL2.ERXPFGF_EL1 == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3.FIEN == '0' then if EL3SDDUndef() then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else X[t, 64] = ERXPFGF_EL1; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3.FIEN == '0' then UNDEFINED; elsif HaveEL(EL3) && SCR_EL3.FIEN == '0' then if EL3SDDUndef() then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else X[t, 64] = ERXPFGF_EL1; elsif PSTATE.EL == EL3 then X[t, 64] = ERXPFGF_EL1;