PMEVCNTSVR<n>_EL1, Performance Monitors Event Count Saved Value Register <n>, n = 0 - 30

Accessing PMEVCNTSVR<n>_EL1

If <n> is greater-than-or-equal-to the number of implemented event counters, then direct reads of PMEVCNTSVR<n>_EL1 are UNDEFINED.

Otherwise, direct reads of PMEVCNTSVR<n>_EL1 generate a Trap exception to EL2 when all of the following are true:

• <n> is greater-than-or-equal-to the number of snapshot registers accessible at the current Exception level.
• EL2 is implemented and enabled in the current Security state.
• The access is from EL1.

Accesses to this register use the following encodings in the System register encoding space:

op0	op1	CRn	CRm	op2
0b10	0b000	0b1110	0b10:m[4:3]	m[2:0]

integer m = UInt(CRm<1:0>:op2<2:0>); if m >= NUM_PMU_COUNTERS then UNDEFINED; elsif PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3.EnPMSS == '0' then UNDEFINED; elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT2) && ((HaveEL(EL3) && SCR_EL3.FGTEn2 == '0') || HDFGRTR2_EL2.nPMSSDATA == '0') then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && m >= GetNumEventCountersAccessible() then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3.EnPMSS == '0' then if EL3SDDUndef() then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else X[t, 64] = PMEVCNTSVR_EL1[m]; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3.EnPMSS == '0' then UNDEFINED; elsif HaveEL(EL3) && MDCR_EL3.EnPMSS == '0' then if EL3SDDUndef() then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else X[t, 64] = PMEVCNTSVR_EL1[m]; elsif PSTATE.EL == EL3 then X[t, 64] = PMEVCNTSVR_EL1[m];