The CTICLAIMSET characteristics are:
Used by software to set CLAIM bits to 1.
CTICLAIMSET is in the Debug power domain.
Implementation of this register is OPTIONAL.
CTICLAIMSET is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CLAIM31 | CLAIM30 | CLAIM29 | CLAIM28 | CLAIM27 | CLAIM26 | CLAIM25 | CLAIM24 | CLAIM23 | CLAIM22 | CLAIM21 | CLAIM20 | CLAIM19 | CLAIM18 | CLAIM17 | CLAIM16 | CLAIM15 | CLAIM14 | CLAIM13 | CLAIM12 | CLAIM11 | CLAIM10 | CLAIM9 | CLAIM8 | CLAIM7 | CLAIM6 | CLAIM5 | CLAIM4 | CLAIM3 | CLAIM2 | CLAIM1 | CLAIM0 |
CLAIM tag set bit.
If x is less than the IMPLEMENTATION DEFINED number of CLAIM tags, this field is RAO and the behavior on writes is:
CLAIM<x> | Meaning |
---|---|
0b0 |
No action. |
0b1 |
Indirectly set CLAIM<x> tag to 1. |
A single write to CTICLAIMSET can set multiple tags to 1.
If x is greater than or equal to the IMPLEMENTATION DEFINED number of CLAIM tags, this bit is RAZ/WI.
An External Debug reset clears the CLAIM tag bits to 0.
Component | Offset | Instance |
---|---|---|
CTI | 0xFA0 | CTICLAIMSET |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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