The CTIOUTEN<n> characteristics are:
Defines which input channels generate output trigger n.
CTIOUTEN<n> is in the Debug power domain.
If output trigger n is not implemented or not connected, CTIOUTEN<n> is RES0.
CTIOUTEN<n> is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OUTEN31 | OUTEN30 | OUTEN29 | OUTEN28 | OUTEN27 | OUTEN26 | OUTEN25 | OUTEN24 | OUTEN23 | OUTEN22 | OUTEN21 | OUTEN20 | OUTEN19 | OUTEN18 | OUTEN17 | OUTEN16 | OUTEN15 | OUTEN14 | OUTEN13 | OUTEN12 | OUTEN11 | OUTEN10 | OUTEN9 | OUTEN8 | OUTEN7 | OUTEN6 | OUTEN5 | OUTEN4 | OUTEN3 | OUTEN2 | OUTEN1 | OUTEN0 |
Input channel <x> to output trigger <n> enable.
Bits [31:N] are RAZ/WI. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.
Possible values of this bit are:
| OUTEN<x> | Meaning |
|---|---|
| 0b0 |
An event on input channel <x> will not cause output trigger <n> to be asserted. |
| 0b1 |
An event on input channel <x> will cause output trigger <n> to be asserted. |
The reset behavior of this field is:
| Component | Offset | Instance |
|---|---|---|
| CTI | 0x0A0 + (4 * n) | CTIOUTEN<n> |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.