The ERRDEVID characteristics are:
Provides discovery information for the component.
ERRDEVID is implemented only as part of a memory-mapped group of error records.
ERRDEVID is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PFG | RES0 | IRQCR | NUM |
Reserved, RES0.
Common Fault Injection Mechanism. Describes whether any Common Fault Injection Mechanism registers are implemented in the same page as this register.
The value of this field is an IMPLEMENTATION DEFINED choice of:
PFG | Meaning |
---|---|
0b0 |
Any Common Fault Injection Mechanism registers are implemented in the same page as this register. |
0b1 |
Any Common Fault Injection Mechanism registers are implemented in a separate fault injection group page. |
The value of this field does not indicate that any Common Fault Injection Mechanism registers are implemented by the nodes in this error record group. Software must use ERR<n>FR to discover whether each node implements Common Fault Injection Mechanism registers.
Accessing this field has the following behavior:
Reserved, RAZ.
Reserved, RES0.
Interrupt Control registers. Describes whether the interrupt control registers are implemented.
The value of this field is an IMPLEMENTATION DEFINED choice of:
IRQCR | Meaning |
---|---|
0b0000 |
It is IMPLEMENTATION DEFINED whether any interrupt control registers are implemented. |
0b0001 |
An IMPLEMENTATION DEFINED form of interrupt control registers are implemented. |
0b0010 |
The recommended layout form of interrupt control registers are implemented, for simple interrupts. |
0b0011 |
The recommended layout form of interrupt control registers are implemented, for message-signaled interrupts. |
0b1111 |
Interrupt control registers are not implemented. |
All other values are reserved.
Accessing this field has the following behavior:
Highest numbered index of the error records in this group, plus one. Each implemented record is owned by a node. A node might own multiple records.
This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Component | Offset | Instance |
---|---|---|
RAS | 0xFC8 | ERRDEVID |
Accesses on this interface are RO.
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.