ERRIIDR

This register is present only when RAS System Architecture v1p1 is implemented. Otherwise, direct accesses to ERRIIDR are RES0.

Attributes

Field descriptions

ProductID, bits [31:20]

Part number, bits [11:0]. The part number is selected by the designer of the component.

If ERRPIDR0 and ERRPIDR1 are implemented, ERRPIDR0.PART_0 matches bits [7:0] of ERRIIDR.ProductID and ERRPIDR1.PART_1 matches bits [11:8] of ERRIIDR.ProductID.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Variant, bits [19:16]

Component major revision.

This field distinguishes product variants or major revisions of the product.

If ERRPIDR2 is implemented, ERRPIDR2.REVISION matches ERRIIDR.Variant.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Revision, bits [15:12]

Component minor revision.

This field distinguishes minor revisions of the product.

If ERRPIDR3 is implemented, ERRPIDR3.REVAND matches ERRIIDR.Revision.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Implementer, bits [11:8, 6:0]

Contains the JEP106 code of the company that implemented the RAS component. For an Arm implementation, this field has the value 0x43B.

Bits [11:8] contain the JEP106 continuation code of the implementer, and bits [6:0] contain the JEP106 identity code of the implementer.

If ERRPIDR4 is implemented, ERRPIDR2 is implemented, and ERRPIDR1 is implemented, ERRPIDR4.DES_2 matches bits [11:8] of ERRIIDR.Implementer, ERRPIDR2.DES_1 matches bits [6:4] of ERRIIDR.Implementer, and ERRPIDR1.DES_0 matches bits [3:0] of ERRIIDR.Implementer.

This field has an IMPLEMENTATION DEFINED value.

The Implementer field is split as follows:

Implementer[10:7] is ERRIIDR[11:8].
Implementer[6:0] is ERRIIDR[6:0].

Access to this field is RO.

Bit [7]

Accessing ERRIIDR

ERRIIDR can be accessed through the memory-mapped interfaces:

ERRIIDR, Implementation Identification Register

Purpose

Configuration

Attributes

Field descriptions

ProductID, bits [31:20]

Variant, bits [19:16]

Revision, bits [15:12]

Implementer, bits [11:8, 6:0]

Bit [7]

Accessing ERRIIDR

ERRIIDR can be accessed through the memory-mapped interfaces:

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ProductID												Variant				Revision				Implementer[10:7]				RES0	Implementer[6:0]