The GITS_BASER<n> characteristics are:
Specifies the base address and size of the ITS tables.
A copy of this register is provided for each ITS table.
Bits [63:32] and bits [31:0] are accessible independently.
A maximum of 8 GITS_BASER<n> registers can be provided. Unimplemented registers are RES0.
When GITS_CTLR.Enabled == 1 or GITS_CTLR.Quiescent == 0, writing this register is UNPREDICTABLE.
GITS_BASER<n> is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Valid | Indirect | InnerCache | Type | OuterCache | Entry_Size | Physical_Address | |||||||||||||||||||||||||
Physical_Address | Shareability | Page_Size | Size |
Indicates whether software has allocated memory for the table:
Valid | Meaning |
---|---|
0b0 | No memory is allocated for the table. The ITS discards any writes to the interrupt translation page when either:
|
0b1 |
Memory is allocated to the table. |
The reset behavior of this field is:
This field indicates whether an implemented register specifies a single, flat table or a two-level table where the first level contains a list of descriptors.
Indirect | Meaning |
---|---|
0b0 |
Single Level. The Size field indicates the number of pages used by the ITS to store data associated with each table entry. |
0b1 |
Two Level. The Size field indicates the number of pages which contain an array of 64-bit descriptors to pages that are used to store the data associated with each table entry. A little endian memory order model is used. |
For more information, see 'The ITS tables' in ARM® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069).
This field is RAZ/WI for GIC implementations that only support flat tables. If the maximum width of the scaling factor that is identified by GITS_BASER<n>.Type and the smallest page size that is supported result in a single level table that requires multiple pages, then implementing this bit as RAZ/WI is DEPRECATED.
The reset behavior of this field is:
Indicates the Inner Cacheability attributes of accesses to the table. The possible values of this field are:
InnerCache | Meaning |
---|---|
0b000 |
Device-nGnRnE. |
0b001 |
Normal Inner Non-cacheable. |
0b010 |
Normal Inner Cacheable Read-allocate, Write-through. |
0b011 |
Normal Inner Cacheable Read-allocate, Write-back. |
0b100 |
Normal Inner Cacheable Write-allocate, Write-through. |
0b101 |
Normal Inner Cacheable Write-allocate, Write-back. |
0b110 |
Normal Inner Cacheable Read-allocate, Write-allocate, Write-through. |
0b111 |
Normal Inner Cacheable Read-allocate, Write-allocate, Write-back. |
The reset behavior of this field is:
Read only. Specifies the type of entity that requires entries in the corresponding table. The possible values of the field are:
Type | Meaning |
---|---|
0b000 |
Unimplemented. This register does not correspond to an ITS table. |
0b001 |
Devices. This register corresponds to an ITS table that scales with the width of the DeviceID. Only a single GITS_BASER<n> register reports this type. |
0b010 |
vPEs. FEAT_GICv4 only. This register corresponds to an ITS table that scales with the number of vPEs in the system. The table requires (ENTRY_SIZE * N) bytes of memory, where N is the number of vPEs in the system. Only a single GITS_BASER<n> register reports this type. |
0b100 |
Interrupt collections. This register corresponds to an ITS table that scales with the number of interrupt collections in the system. The table requires (ENTRY_SIZE * N) bytes of memory, where N is the number of interrupt collections. Not more than one GITS_BASER<n> register will report this type. |
Other values are reserved.
For FEAT_GICv4p1, the registers are allocated as follows:
GITS_BASER0.Type is 0b001 (Device).
GITS_BASER1.Type is either 0b100 (Collection Table) or 0b000 (Unimplemented).
GITS_BASER2.Type is either 0b010 (vPE) or 0b000 (Unimplemented).
GITS_BASER<n>.Type, where 'n' is in the range 3 to 7, is 0b000 (Unimplemented).
For FEAT_GICv3, FEAT_GICv3p1, and FEAT_GICv4, Arm recommends that the GITS_BASER<n> use the same allocations.
Other allocations of Type values are deprecated.
Indicates the Outer Cacheability attributes of accesses to the table. The possible values of this field are:
OuterCache | Meaning |
---|---|
0b000 |
Memory type defined in InnerCache field. For Normal memory, Outer Cacheability is the same as Inner Cacheability. |
0b001 |
Normal Outer Non-cacheable. |
0b010 |
Normal Outer Cacheable Read-allocate, Write-through. |
0b011 |
Normal Outer Cacheable Read-allocate, Write-back. |
0b100 |
Normal Outer Cacheable Write-allocate, Write-through. |
0b101 |
Normal Outer Cacheable Write-allocate, Write-back. |
0b110 |
Normal Outer Cacheable Read-allocate, Write-allocate, Write-through. |
0b111 |
Normal Outer Cacheable Read-allocate, Write-allocate, Write-back. |
It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated.
The reset behavior of this field is:
Read-only. Specifies the number of bytes per table entry, minus one.
Physical Address. When Page_Size is 4KB or 16KB:
When Page_Size is 64KB:
In implementations that support fewer than 52 bits of physical address, any unimplemented upper bits might be RAZ/WI.
The reset behavior of this field is:
Indicates the Shareability attributes of accesses to the table. The possible values of this field are:
Shareability | Meaning |
---|---|
0b00 |
Non-shareable. |
0b01 |
Inner Shareable. |
0b10 |
Outer Shareable. |
0b11 |
Reserved. Treated as 0b00. |
It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated.
The reset behavior of this field is:
The size of page that the table uses:
Page_Size | Meaning |
---|---|
0b00 |
4KB. |
0b01 |
16KB. |
0b10 |
64KB. |
0b11 |
Reserved. Treated as 0b10. |
If the GIC implementation supports only a single, fixed page size, this field might be RO.
The reset behavior of this field is:
The number of pages of physical memory allocated to the table, minus one. GITS_BASER<n>.Page_Size specifies the size of each page.
If GITS_BASER<n>.Type == 0, this field is RAZ/WI.
The reset behavior of this field is:
Component | Offset | Instance |
---|---|---|
GIC ITS control | 0x0100 + (8 * n) | GITS_BASER<n> |
Accesses on this interface are RW.
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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