The TRCIMSPEC0 characteristics are:
TRCIMSPEC0 shows the presence of any IMPLEMENTATION DEFINED features, and provides an interface to enable the features that are provided.
External register TRCIMSPEC0 bits [31:0] are architecturally mapped to AArch64 System register TRCIMSPEC0[31:0].
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCIMSPEC0 are RES0.
TRCIMSPEC0 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | EN | SUPPORT |
Reserved, RES0.
Enable. Controls whether the IMPLEMENTATION DEFINED features are enabled.
EN | Meaning |
---|---|
0b0000 |
The IMPLEMENTATION DEFINED features are not enabled. The trace unit must behave as if the IMPLEMENTATION DEFINED features are not supported. |
0b0001 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0010 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0011 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0100 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0101 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0110 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b0111 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1000 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1001 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1010 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1011 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1100 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1101 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1110 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
0b1111 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
The reset behavior of this field is:
Reserved, RES0.
Indicates whether the implementation supports IMPLEMENTATION DEFINED features.
The value of this field is an IMPLEMENTATION DEFINED choice of:
SUPPORT | Meaning |
---|---|
0b0000 |
No IMPLEMENTATION DEFINED features are supported. |
0b0001 |
IMPLEMENTATION DEFINED features are supported. |
0b0010 |
IMPLEMENTATION DEFINED features are supported. |
0b0011 |
IMPLEMENTATION DEFINED features are supported. |
0b0100 |
IMPLEMENTATION DEFINED features are supported. |
0b0101 |
IMPLEMENTATION DEFINED features are supported. |
0b0110 |
IMPLEMENTATION DEFINED features are supported. |
0b0111 |
IMPLEMENTATION DEFINED features are supported. |
0b1000 |
IMPLEMENTATION DEFINED features are supported. |
0b1001 |
IMPLEMENTATION DEFINED features are supported. |
0b1010 |
IMPLEMENTATION DEFINED features are supported. |
0b1011 |
IMPLEMENTATION DEFINED features are supported. |
0b1100 |
IMPLEMENTATION DEFINED features are supported. |
0b1101 |
IMPLEMENTATION DEFINED features are supported. |
0b1110 |
IMPLEMENTATION DEFINED features are supported. |
0b1111 |
IMPLEMENTATION DEFINED features are supported. |
Use of nonzero values requires written permission from Arm.
Access to this field is RO.
Component | Offset | Instance |
---|---|---|
ETE | 0x1C0 | TRCIMSPEC0 |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.