The TRCOSLSR characteristics are:
Returns the status of the Trace OS Lock.
External register TRCOSLSR bits [31:0] are architecturally mapped to AArch64 System register TRCOSLSR[31:0].
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCOSLSR are RES0.
TRCOSLSR is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | OSLM[2:1] | RES0 | OSLK | OSLM[0] |
Reserved, RES0.
OS Lock model.
The value of this field is an IMPLEMENTATION DEFINED choice of:
OSLM | Meaning |
---|---|
0b000 |
Trace OS Lock is not implemented. |
0b010 |
Trace OS Lock is implemented. |
0b100 |
Trace OS Lock is not implemented, and the trace unit is controlled by the PE OS Lock. |
All other values are reserved.
When FEAT_ETE is implemented, the values 0b000 and 0b010 are not permitted.
The OSLM field is split as follows:
Access to this field is RO.
Reserved, RES0.
OS Lock status.
OSLK | Meaning |
---|---|
0b0 |
The OS Lock is unlocked. |
0b1 |
The OS Lock is locked. |
This field indicates the state of the PE OS Lock.
External debugger accesses to this register are unaffected by the OS Lock.
Component | Offset | Instance |
---|---|---|
ETE | 0x304 | TRCOSLSR |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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