TRCVISSCTLR, Trace ViewInst Start/Stop Control Register

The TRCVISSCTLR characteristics are:

Purpose

Use this to select, or read, the Single Address Comparators for the ViewInst start/stop function.

Configuration

External register TRCVISSCTLR bits [31:0] are architecturally mapped to AArch64 System register TRCVISSCTLR[31:0].

This register is present only when FEAT_ETE is implemented, FEAT_TRC_EXT is implemented and UInt(TRCIDR4.NUMACPAIRS) > 0. Otherwise, direct accesses to TRCVISSCTLR are RES0.

Attributes

TRCVISSCTLR is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
STOP[15]STOP[14]STOP[13]STOP[12]STOP[11]STOP[10]STOP[9]STOP[8]STOP[7]STOP[6]STOP[5]STOP[4]STOP[3]STOP[2]STOP[1]STOP[0]START[15]START[14]START[13]START[12]START[11]START[10]START[9]START[8]START[7]START[6]START[5]START[4]START[3]START[2]START[1]START[0]

STOP[<m>], bit [m+16], for m = 15 to 0

Selects whether Single Address Comparator <m> is used with the ViewInst start/stop function for the purpose of stopping trace.

STOP[<m>]Meaning
0b0

The Single Address Comparator <m> is not selected as a stop resource.

0b1

The Single Address Comparator <m> is selected as a stop resource.

The reset behavior of this field is:

Accessing this field has the following behavior:

START[<m>], bit [m], for m = 15 to 0

Selects whether Single Address Comparator <m> is used with the ViewInst start/stop function for the purpose of starting trace.

START[<m>]Meaning
0b0

The Single Address Comparator <m> is not selected as a start resource.

0b1

The Single Address Comparator <m> is selected as a start resource.

The reset behavior of this field is:

Accessing this field has the following behavior:

Accessing TRCVISSCTLR

Must be programmed if TRCIDR4.NUMACPAIRS > 0b0000.

For any 2 comparators selected for the ViewInst start/stop function, the comparator containing the lower address must be a lower numbered comparator.

Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.

TRCVISSCTLR can be accessed through the external debug interface:

ComponentOffsetInstance
ETE0x088TRCVISSCTLR

This interface is accessible as follows:


26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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