The CNTVCTSS_EL0 characteristics are:
Reads of CNTVCTSS_EL0 return the 64-bit physical count value minus a virtual offset.
AArch64 System register CNTVCTSS_EL0 bits [63:0] are architecturally mapped to AArch32 System register CNTVCTSS[63:0].
This register is present only when FEAT_ECV is implemented. Otherwise, direct accesses to CNTVCTSS_EL0 are UNDEFINED.
All reads to the CNTVCTSS_EL0 occur in program order relative to reads to CNTVCT_EL0 or CNTVCTSS_EL0.
This register is a self-synchronised view of the CNTVCT_EL0 counter, and cannot be read speculatively.
CNTVCTSS_EL0 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Self-synchronized virtual count value | |||||||||||||||||||||||||||||||
Self-synchronized virtual count value |
Self-synchronized virtual count value.
When EL2 is implemented, if the access is not trapped, and any of the following are true, then reads of CNTVCTSS_EL0 from EL0 and EL1 return (PhysicalCountInt<63:0> - CNTVOFF_EL2<63:0>):
Otherwise reads of CNTVCTSS_EL0 return PhysicalCountInt<63:0>.
PhysicalCountInt is defined by 'The Physical Counter'.
The reset behavior of this field is:
Accesses to this register use the following encodings in the System register encoding space:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b011 | 0b1110 | 0b0000 | 0b110 |
if PSTATE.EL == EL0 then if !ELIsInHost(EL0) && CNTKCTL_EL1.EL0VCTEN == '0' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); elsif ELIsInHost(EL0) && CNTHCTL_EL2.EL0VCTEN == '0' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && !ELIsInHost(EL0) && CNTHCTL_EL2.EL1TVCT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else if HaveEL(EL2) && (!EL2Enabled() || !ELIsInHost(EL0)) then X[t, 64] = PhysicalCountInt() - CNTVOFF_EL2; else X[t, 64] = PhysicalCountInt(); elsif PSTATE.EL == EL1 then if EL2Enabled() && CNTHCTL_EL2.EL1TVCT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else if HaveEL(EL2) then X[t, 64] = PhysicalCountInt() - CNTVOFF_EL2; else X[t, 64] = PhysicalCountInt(); elsif PSTATE.EL == EL2 then if !ELIsInHost(EL2) then X[t, 64] = PhysicalCountInt() - CNTVOFF_EL2; else X[t, 64] = PhysicalCountInt(); elsif PSTATE.EL == EL3 then if HaveEL(EL2) && !ELUsingAArch32(EL2) then X[t, 64] = PhysicalCountInt() - CNTVOFF_EL2; elsif HaveEL(EL2) && ELUsingAArch32(EL2) then X[t, 64] = PhysicalCountInt() - CNTVOFF; else X[t, 64] = PhysicalCountInt();
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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