TRCCONFIGR, Trace Configuration Register

The TRCCONFIGR characteristics are:

Purpose

Controls the tracing options.

Configuration

External register TRCCONFIGR bits [31:0] are architecturally mapped to AArch64 System register TRCCONFIGR[31:0].

This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCCONFIGR are RES0.

Attributes

TRCCONFIGR is a 32-bit register.

Field descriptions

Bits [31:19]

ITO, bit [18]
When TRCIDR0.ITE == 1:

Otherwise:

Bits [17:16]

VMIDOPT, bit [15]
When TRCIDR2.VMIDOPT == 0b01:

When TRCIDR2.VMIDOPT == 0b00:

When TRCIDR2.VMIDOPT == 0b10:

Otherwise:

QE, bits [14:13]
When TRCIDR0.QSUPP == 0b01:

When TRCIDR0.QSUPP == 0b10:

When TRCIDR0.QSUPP == 0b11:

Otherwise:

RS, bit [12]
When TRCIDR0.RETSTACK == 1:

Otherwise:

TS, bit [11]
When TRCIDR0.TSSIZE != 0b00000:

Otherwise:

Bits [10:8]

VMID, bit [7]
When TRCIDR2.VMIDSIZE != 0b00000:

Otherwise:

CID, bit [6]
When TRCIDR2.CIDSIZE != 0b00000:

Otherwise:

Bit [5]

CCI, bit [4]
When TRCIDR0.TRCCCI == 1:

Otherwise:

BB, bit [3]
When TRCIDR0.TRCBB == 1:

Otherwise:

Bits [2:1]

Bit [0]

Accessing TRCCONFIGR

Must always be programmed.

TRCCONFIGR.QE must be set to 0b00 if TRCCONFIGR.BB is not 0.

Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.

TRCCONFIGR can be accessed through the external debug interface:

This interface is accessible as follows:

• When OSLockStatus(), or !IsTraceCorePowered() or !AllowExternalTraceAccess(), accesses to this register generate an error response.
• Otherwise, accesses to this register are RW.

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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