Branch with Link to Register calls a subroutine at an address in a register, setting register X30 to PC+4.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rn | 0 | 0 | 0 | 0 | 0 | ||||
Z | op | op2 | A | M | Rm |
BLR <Xn>
integer n = UInt(Rn);
<Xn> |
Is the 64-bit name of the general-purpose register holding the address to be branched to, encoded in the "Rn" field. |
if IsFeatureImplemented(FEAT_GCS) && GCSPCREnabled(PSTATE.EL) then AddGCSRecord(PC64 + 4); // Value in BTypeNext will be used to set PSTATE.BTYPE BTypeNext = '10'; X[30, 64] = PC64 + 4; bits(64) target = X[n, 64]; boolean branch_conditional = FALSE; BranchTo(target, BranchType_INDCALL, branch_conditional);
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.