Load Register, with pointer authentication. This instruction authenticates an address from a base register using a modifier of zero and the specified key, adds an immediate offset to the authenticated address, and loads a 64-bit doubleword from memory at this resulting address into a register.
Key A is used for LDRAA. Key B is used for LDRAB.
If the authentication passes, the PE behaves the same as for an LDR instruction. For information on behavior if the authentication fails, see Faulting on pointer authentication.
The authenticated address is not written back to the base register, unless the pre-indexed variant of the instruction is used. In this case, the address that is written back to the base register does not include the pointer authentication code.
For information about addressing modes, see Load/Store addressing modes.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | M | S | 1 | imm9 | W | 1 | Rn | Rt | ||||||||||||||||
size | VR |
if !IsFeatureImplemented(FEAT_PAuth) then UNDEFINED; integer t = UInt(Rt); integer n = UInt(Rn); boolean wback = W == '1'; boolean use_key_a = M == '0'; bits(10) S10 = S:imm9; bits(64) offset = LSL(SignExtend(S10, 64), 3); boolean nontemporal = FALSE; boolean tagchecked = wback || n != 31;
<Xt> |
Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
<Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
<simm> |
Is the optional signed immediate byte offset, a multiple of 8 in the range -4096 to 4088, defaulting to 0 and encoded in the "S:imm9" field as <simm>/8. |
bits(64) address; bits(64) data; boolean privileged = PSTATE.EL != EL0; boolean wb_unknown = FALSE; boolean auth_then_branch = TRUE; AccessDescriptor accdesc = CreateAccDescGPR(MemOp_LOAD, nontemporal, privileged, tagchecked); if wback && n == t && n != 31 then Constraint c = ConstrainUnpredictable(Unpredictable_WBOVERLAPLD); assert c IN {Constraint_WBSUPPRESS, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_WBSUPPRESS wback = FALSE; // writeback is suppressed when Constraint_UNKNOWN wb_unknown = TRUE; // writeback is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP EndOfInstruction(); if n == 31 then address = SP[]; else address = X[n, 64]; if use_key_a then address = AuthDA(address, X[31, 64], auth_then_branch); else address = AuthDB(address, X[31, 64], auth_then_branch); if n == 31 then CheckSPAlignment(); address = AddressAdd(address, offset, accdesc); data = Mem[address, 8, accdesc]; X[t, 64] = data; if wback then if wb_unknown then address = bits(64) UNKNOWN; if n == 31 then SP[] = address; else X[n, 64] = address;
If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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