MOVA (vector to tile, single)

Move vector register to ZA tile slice

The instruction operates on individual horizontal or vertical slices within a named ZA tile of the specified element size. The slice number within the tile is selected by the sum of the slice index register and immediate offset, modulo the number of such elements in a vector. The immediate offset is in the range 0 to the number of elements in a 128-bit vector segment minus 1.

Inactive elements in the destination slice remain unmodified.

This instruction is used by the alias MOV (vector to tile, single).

It has encodings from 5 classes: 8-bit , 16-bit , 32-bit , 64-bit and 128-bit

8-bit
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
1100000000000000VRsPgZn0off4
size<1>size<0>Q

MOVA ZA0<HV>.B[<Ws>, <offs>], <Pg>/M, <Zn>.B

if !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer g = UInt(Pg); constant integer s = UInt('011':Rs); constant integer n = UInt(Zn); constant integer d = 0; constant integer offset = UInt(off4); constant integer esize = 8; constant boolean vertical = V == '1';

16-bit
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
1100000001000000VRsPgZn0ZAdoff3
size<1>size<0>Q

MOVA <ZAd><HV>.H[<Ws>, <offs>], <Pg>/M, <Zn>.H

if !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer g = UInt(Pg); constant integer s = UInt('011':Rs); constant integer n = UInt(Zn); constant integer d = UInt(ZAd); constant integer offset = UInt(off3); constant integer esize = 16; constant boolean vertical = V == '1';

32-bit
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
1100000010000000VRsPgZn0ZAdoff2
size<1>size<0>Q

MOVA <ZAd><HV>.S[<Ws>, <offs>], <Pg>/M, <Zn>.S

if !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer g = UInt(Pg); constant integer s = UInt('011':Rs); constant integer n = UInt(Zn); constant integer d = UInt(ZAd); constant integer offset = UInt(off2); constant integer esize = 32; constant boolean vertical = V == '1';

64-bit
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
1100000011000000VRsPgZn0ZAdo1
size<1>size<0>Q

MOVA <ZAd><HV>.D[<Ws>, <offs>], <Pg>/M, <Zn>.D

if !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer g = UInt(Pg); constant integer s = UInt('011':Rs); constant integer n = UInt(Zn); constant integer d = UInt(ZAd); constant integer offset = UInt(o1); constant integer esize = 64; constant boolean vertical = V == '1';

128-bit
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
1100000011000001VRsPgZn0ZAd
size<1>size<0>Q

MOVA <ZAd><HV>.Q[<Ws>, <offs>], <Pg>/M, <Zn>.Q

if !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer g = UInt(Pg); constant integer s = UInt('011':Rs); constant integer n = UInt(Zn); constant integer d = UInt(ZAd); constant integer offset = 0; constant integer esize = 128; constant boolean vertical = V == '1';

Assembler Symbols

<ZAd>

For the 16-bit variant: is the name of the ZA tile ZA0-ZA1 to be accessed, encoded in the "ZAd" field.

For the 32-bit variant: is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAd" field.

For the 64-bit variant: is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAd" field.

For the 128-bit variant: is the name of the ZA tile ZA0-ZA15 to be accessed, encoded in the "ZAd" field.

<HV>

Is the horizontal or vertical slice indicator, encoded in V:

V <HV>
0 H
1 V
<Ws>

Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field.

<offs>

For the 8-bit variant: is the slice index offset, in the range 0 to 15, encoded in the "off4" field.

For the 16-bit variant: is the slice index offset, in the range 0 to 7, encoded in the "off3" field.

For the 32-bit variant: is the slice index offset, in the range 0 to 3, encoded in the "off2" field.

For the 64-bit variant: is the slice index offset, in the range 0 to 1, encoded in the "o1" field.

For the 128-bit variant: is the slice index offset, with implicit value 0.

<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>

Is the name of the source scalable vector register, encoded in the "Zn" field.

Operation

CheckStreamingSVEAndZAEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer dim = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand = Z[n, VL]; constant bits(32) index = X[s, 32]; constant integer slice = (UInt(index) + offset) MOD dim; constant bits(VL) result = ZAslice[d, esize, vertical, slice, VL]; for e = 0 to dim-1 constant bits(esize) element = Elem[operand, e, esize]; if ActivePredicateElement(mask, e, esize) then Elem[result, e, esize] = element; ZAslice[d, esize, vertical, slice, VL] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.