Move and zero two ZA tile slices to vector registers
The instruction operates on two consecutive horizontal or vertical slices within a named ZA tile of the specified element size. The tile slices are zeroed after moving their contents to the destination vectors.
The consecutive slice numbers within the tile are selected starting from the sum of the slice index register and immediate offset, modulo the number of such elements in a vector. The immediate offset is a multiple of 2 in the range 0 to the number of elements in a 128-bit vector segment minus 2.
This instruction is unpredicated.
It has encodings from 4 classes: 8-bit , 16-bit , 32-bit and 64-bit
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | V | Rs | 0 | 0 | 0 | 1 | 0 | off3 | Zd | 0 | ||||||
size<1> | size<0> |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer s = UInt('011':Rs); constant integer nreg = 2; constant integer esize = 8; constant integer d = UInt(Zd:'0'); constant integer n = 0; constant integer offset = UInt(off3:'0'); constant boolean vertical = V == '1';
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | V | Rs | 0 | 0 | 0 | 1 | 0 | ZAn | off2 | Zd | 0 | |||||
size<1> | size<0> |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer s = UInt('011':Rs); constant integer nreg = 2; constant integer esize = 16; constant integer d = UInt(Zd:'0'); constant integer n = UInt(ZAn); constant integer offset = UInt(off2:'0'); constant boolean vertical = V == '1';
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | V | Rs | 0 | 0 | 0 | 1 | 0 | ZAn | o1 | Zd | 0 | |||||
size<1> | size<0> |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer s = UInt('011':Rs); constant integer nreg = 2; constant integer esize = 32; constant integer d = UInt(Zd:'0'); constant integer n = UInt(ZAn); constant integer offset = UInt(o1:'0'); constant boolean vertical = V == '1';
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | V | Rs | 0 | 0 | 0 | 1 | 0 | ZAn | Zd | 0 | ||||||
size<1> | size<0> |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer s = UInt('011':Rs); constant integer nreg = 2; constant integer esize = 64; constant integer d = UInt(Zd:'0'); constant integer n = UInt(ZAn); constant integer offset = 0; constant boolean vertical = V == '1';
<Zd1> |
Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 2. |
<Zd2> |
Is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1. |
<HV> |
Is the horizontal or vertical slice indicator,
encoded in
|
<Ws> |
Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field. |
CheckStreamingSVEAndZAEnabled(); constant integer VL = CurrentVL; if nreg == 4 && esize == 64 && VL < 256 then UNDEFINED; constant integer slices = VL DIV esize; constant bits(32) index = X[s, 32]; constant integer slice = ((UInt(index) - (UInt(index) MOD nreg)) + offset) MOD slices; for r = 0 to nreg-1 constant bits(VL) result = ZAslice[n, esize, vertical, slice + r, VL]; ZAslice[n, esize, vertical, slice + r, VL] = Zeros(VL); Z[d + r, VL] = result;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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