Pointer Authentication Code for Instruction address, using key A. This instruction computes and inserts a pointer authentication code for an instruction address, using a modifier and key A.
The address is:
The modifier is:
If FEAT_PAuth_LR is implemented and PSTATE.PACM is 1, then PACIA1716 and PACIASP include a second modifier that is:
A PACIASP instruction has an implicit BTI instruction. The implicit BTI instruction of a PACIASP instruction is always compatible with PSTATE.BTYPE == 0b01 and PSTATE.BTYPE == 0b10. Controls in SCTLR_ELx configure whether the implicit BTI instruction of a PACIASP instruction is compatible with PSTATE.BTYPE == 0b11. For more information, see PSTATE.BTYPE.
It has encodings from 2 classes: Integer and System
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | Z | 0 | 0 | 0 | Rn | Rd | ||||||||
sf | S | opcode2 |
if !IsFeatureImplemented(FEAT_PAuth) then UNDEFINED; boolean source_is_sp = FALSE; boolean pacia1716 = FALSE; integer d = UInt(Rd); integer n = UInt(Rn); if Z == '0' then // PACIA if n == 31 then source_is_sp = TRUE; else // PACIZA if n != 31 then UNDEFINED;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | x | 1 | 0 | 0 | x | 1 | 1 | 1 | 1 | 1 |
CRm | op2 |
if !IsFeatureImplemented(FEAT_PAuth) then EndOfInstruction(); // Instruction executes as NOP integer d; integer n; boolean source_is_sp = FALSE; boolean pacia1716 = FALSE; case CRm:op2 of when '0011 000' // PACIAZ d = 30; n = 31; when '0011 001' // PACIASP d = 30; source_is_sp = TRUE; if IsFeatureImplemented(FEAT_BTI) then // Check for branch target compatibility between PSTATE.BTYPE // and implicit branch target of PACIASP instruction. SetBTypeCompatible(BTypeCompatible_PACIXSP()); when '0001 000' // PACIA1716 d = 17; n = 16; pacia1716 = TRUE; when '0001 010' SEE "PACIB"; when '0001 100' SEE "AUTIA"; when '0001 110' SEE "AUTIB"; when '0011 01x' SEE "PACIB"; when '0011 10x' SEE "AUTIA"; when '0011 11x' SEE "AUTIB"; when '0000 111' SEE "XPACLRI"; otherwise SEE "HINT";
<Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
<Xn|SP> |
Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the "Rn" field. |
if source_is_sp then if IsFeatureImplemented(FEAT_PAuth_LR) && PSTATE.PACM == '1' then X[d, 64] = AddPACIA2(X[d, 64], SP[], PC64); else X[d, 64] = AddPACIA(X[d, 64], SP[]); else if IsFeatureImplemented(FEAT_PAuth_LR) && PSTATE.PACM == '1' && pacia1716 then X[d, 64] = AddPACIA2(X[d, 64], X[n, 64], X[15, 64]); else X[d, 64] = AddPACIA(X[d, 64], X[n, 64]);
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.