Set condition flags for predicate
Sets the First (N), None (Z), !Last (C) condition flags based on the predicate source register, and the V flag to zero.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Pg | 0 | Pn | 0 | 0 | 0 | 0 | 0 | ||||||
S |
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer esize = 8; constant integer g = UInt(Pg); constant integer n = UInt(Pn);
<Pg> |
Is the name of the governing scalable predicate register, encoded in the "Pg" field. |
<Pn> |
Is the name of the source scalable predicate register, encoded in the "Pn" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant bits(PL) mask = P[g, PL]; constant bits(PL) result = P[n, PL]; PSTATE.<N,Z,C,V> = PredTest(mask, result, esize);
If FEAT_SVE2 is implemented or FEAT_SME is implemented, then if PSTATE.DIT is 1:
If FEAT_SME is implemented and the PE is in Streaming SVE mode, then any subsequent instruction which is dependent on the predicate register written by this instruction might be significantly delayed.
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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