RCWSCLRP, RCWSCLRPA, RCWSCLRPL, RCWSCLRPAL

Read Check Write Software atomic bit Clear on quadword in memory atomically loads a 128-bit quadword from memory, performs a bitwise AND with the complement of the value held in a pair of registers on it, and conditionally stores the result back to memory. Storing of the result back to memory is conditional on RCW Checks and RCWS Checks. The value initially loaded from memory is returned in the same pair of registers. This instruction updates the condition flags based on the result of the update of memory.

• RCWSCLRPA and RCWSCLRPAL load from memory with acquire semantics.
• RCWSCLRPL and RCWSCLRPAL store to memory with release semantics.
• RCWSCLRP has neither acquire nor release semantics.

Integer
(FEAT_D128 && FEAT_THE)

if !IsFeatureImplemented(FEAT_D128) || !IsFeatureImplemented(FEAT_THE) then UNDEFINED; if Rt == '11111' then UNDEFINED; if Rt2 == '11111' then UNDEFINED; integer t = UInt(Rt); integer t2 = UInt(Rt2); integer n = UInt(Rn); boolean soft = TRUE; boolean acquire = A == '1'; boolean release = R == '1'; boolean tagchecked = n != 31; boolean rt_unknown = FALSE; if t == t2 then Constraint c = ConstrainUnpredictable(Unpredictable_LSE128OVERLAP); assert c IN {Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_UNKNOWN rt_unknown = TRUE; // result is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP EndOfInstruction();

Assembler Symbols