Read multiple of vector register size to scalar register
Multiply the current vector register size in bytes by an immediate in the range -32 to 31 and place the result in the 64-bit destination general-purpose register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | imm6 | Rd | |||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer d = UInt(Rd); constant integer imm = SInt(imm6);
| <Xd> |
Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field. |
| <imm> |
Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer len = imm * (VL DIV 8); X[d, 64] = len<63:0>;
If FEAT_SVE2 is implemented or FEAT_SME is implemented, then if PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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