RPRFM

Range Prefetch Memory signals the memory system that data memory accesses from a specified range of addresses are likely to occur in the near future. The instruction may also signal the memory system about the likelihood of data reuse of the specified range of addresses. The memory system can respond by taking actions that are expected to speed up the memory accesses when they do occur, such as prefetching locations within the specified address ranges into one or more caches. The memory system may also exploit the data reuse hints to decide whether to retain the data in other caches upon eviction from the innermost caches or to discard it.

The effect of an RPRFM instruction is IMPLEMENTATION DEFINED. For more information, see Prefetch memory.

An RPRFM instruction specifies the type of accesses and range of addresses using the following parameters:


Note

Software is expected to honor the parameters it provides to the RPRFM instruction, and the same PE should access all locations in the range, in the direction specified by the sign of the 'Length' and 'Stride' parameters. A range prefetch is considered active on a PE until all locations in the range have been accessed by the PE. A range prefetch might also be inactivated by the PE prior to completion, for example due to a software context switch or lack of hardware resources.

Software should not specify overlapping addresses in multiple active ranges. If a range is expected to be accessed by both load and store instructions (read-modify-write), then a single range with a 'Type' parameter of PST (prefetch for store) should be specified.


Integer
(FEAT_RPRFM)

313029282726252423222120191817161514131211109876543210
11111000101Rmx1xS10Rn11xxx
sizeVRopcoptionRt

RPRFM (<rprfop>|#<imm6>), <Xm>, [<Xn|SP>]

bits(6) operation = option<2>:option<0>:S:Rt<2:0>; integer n = UInt(Rn); integer m = UInt(Rm);

Assembler Symbols

<rprfop>

Is the range prefetch operation, defined as <type><policy>.

<type> is one of:

PLD
Prefetch for load, encoded in the "Rt<0>" field as 0.
PST
Prefetch for store, encoded in the "Rt<0>" field as 1.

<policy> is one of:

KEEP
Retained or temporal prefetch, for data that is expected to be kept in caches to be accessed more than once, encoded in the "option<2>:option<0>:S:Rt<2:1>" fields as 0b00000.
STRM
Streaming or non-temporal prefetch, for data that is expected to be accessed once and not reused, encoded in the "option<2>:option<0>:S:Rt<2:1>" fields as 0b00010.

For other encodings of the "option<2>:option<0>:S:Rt<2:0>" fields, use <imm6>.

option<2> option<0> S Rt<2:0> <rprfop>
0 0 0 000 PLDKEEP
0 0 0 001 PSTKEEP
0 0 0 100 PLDSTRM
0 0 0 101 PSTSTRM
<imm6>

Is the range prefetch operation encoding as an immediate, in the range 0 to 63, encoded in "option<2>:option<0>:S:Rt<2:0>". This syntax is only for encodings that are not representable using <rprfop>.

<Xm>

Is the 64-bit name of the general-purpose register that holds an encoding of the metadata, encoded in the "Rm" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

Operation

bits(64) address = if n == 31 then SP[] else X[n, 64]; bits(64) metadata = X[m, 64]; integer stride = SInt(metadata<59:38>); integer count = UInt(metadata<37:22>) + 1; integer length = SInt(metadata<21:0>); integer reuse; if metadata<63:60> == '0000' then reuse = -1; // Not known else reuse = 32768 << (15 - UInt(metadata<63:60>)); Hint_RangePrefetch(address, length, stride, count, reuse, operation);


Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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