Signed saturating decrement vector by multiple of 16-bit predicate constraint element count
Determines the number of active 16-bit elements implied by the named predicate constraint, multiplies that by an immediate in the range 1 to 16 inclusive, and then uses the result to decrement all destination vector elements. The results are saturated to the 16-bit signed integer range.
The named predicate constraint limits the number of active elements in a single predicate to:
Unspecified or out of range constraint encodings generate an empty predicate or zero element count rather than Undefined Instruction exception.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm4 | 1 | 1 | 0 | 0 | 1 | 0 | pattern | Zdn | |||||||||||
| size<1> | size<0> | D | U | ||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer esize = 16; constant integer dn = UInt(Zdn); constant bits(5) pat = pattern; constant integer imm = UInt(imm4) + 1; constant boolean unsigned = FALSE;
| <Zdn> |
Is the name of the source and destination scalable vector register, encoded in the "Zdn" field. |
| <imm> |
Is the immediate multiplier, in the range 1 to 16, defaulting to 1, encoded in the "imm4" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; constant integer count = DecodePredCount(pat, esize); constant bits(VL) operand1 = Z[dn, VL]; bits(VL) result; for e = 0 to elements-1 constant integer element1 = Int(Elem[operand1, e, esize], unsigned); (Elem[result, e, esize], -) = SatQ(element1 - (count * imm), esize, unsigned); Z[dn, VL] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is constrained unpredictable:
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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