Zero ZA quad-vector groups
The instruction zeroes one, two, or four ZA quad-vector groups.
The quad-vector group within all of, each half of, or each quarter of the ZA array is selected by the sum of the vector select register and offset range, modulo all, half, or quarter the number of ZA array vectors.
The vector group symbol, VGx2 or VGx4, indicates that the ZA operand consists of two or four ZA quad-vector groups respectively.
It has encodings from 3 classes: One ZA quad-vector , Two ZA quad-vectors and Four ZA quad-vectors
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1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | Rv | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | off2 |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer v = UInt('010':Rv); constant integer offset = UInt(off2:'00'); constant integer ngrp = 1; constant integer nvec = 4;
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1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | Rv | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | o1 |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer v = UInt('010':Rv); constant integer offset = UInt(o1:'00'); constant integer ngrp = 2; constant integer nvec = 4;
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1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | Rv | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | o1 |
if !IsFeatureImplemented(FEAT_SME2p1) then UNDEFINED; constant integer v = UInt('010':Rv); constant integer offset = UInt(o1:'00'); constant integer ngrp = 4; constant integer nvec = 4;
<Wv> |
Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field. |
CheckStreamingSVEAndZAEnabled(); constant integer VL = CurrentVL; constant integer vectors = VL DIV 8; constant integer vstride = vectors DIV ngrp; constant bits(32) vbase = X[v, 32]; integer vec = (UInt(vbase) + offset) MOD vstride; vec = vec - (vec MOD nvec); for r = 0 to ngrp-1 for i = 0 to nvec-1 ZAvector[vec + i, VL] = Zeros(VL); vec = vec + vstride;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45
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