The TRCPIDR3 characteristics are:
Provides discovery information about the component.
For additional information, see the CoreSight Architecture Specification.
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCPIDR3 are RES0.
TRCPIDR3 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | REVAND | CMOD |
Reserved, RES0.
Component minor revision.
TRCPIDR2.REVISION and TRCPIDR3.REVAND together form the revision number of the component, with TRCPIDR2.REVISION being the most significant part and TRCPIDR3.REVAND the least significant part. When a component is changed, TRCPIDR2.REVISION or TRCPIDR3.REVAND are increased to ensure that software can differentiate the different revisions of the component. TRCPIDR3.REVAND should be set to 0b0000 when TRCPIDR2.REVISION is increased.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Customer Modified.
Indicates the component has been modified.
A value of 0b0000 means the component is not modified from the original design.
Any other value means the component has been modified in an IMPLEMENTATION DEFINED way.
For any two components with the same Unique Component Identifier:
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
External debugger accesses to this register are unaffected by the OS Lock.
Component | Offset | Instance |
---|---|---|
ETE | 0xFEC | TRCPIDR3 |
This interface is accessible as follows:
26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6
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